Instruction Set Architecture

Instruction Set Architecture

Instruction Set Architecture (ISA) defines the interface between software and hardware. It specifies the instructions that a processor can execute.

Instruction Formats

Three-Address Instructions

Format: OP DEST, SRC1, SRC2

Example: ADD R1, R2, R3

• Operation: ADD
• Destination: R1
• Source 1: R2
• Source 2: R3
• Meaning: R1 = R2 + R3

Advantages:

• Flexible
• Less instructions needed

Disadvantages:

• Longer instruction format
• More bits required

Two-Address Instructions

Format: OP DEST, SRC

Example: ADD R1, R2

• Meaning: R1 = R1 + R2

Advantages:

• Shorter instructions
• Common in many processors

Disadvantages:

• Destination overwritten
• More instructions needed

One-Address Instructions

Format: OP SRC

Example: ADD R2

• Uses accumulator (implicit destination)
• Meaning: ACC = ACC + R2

Advantages:

• Very short instructions
• Simple hardware

Disadvantages:

• Limited flexibility
• Accumulator bottleneck

Zero-Address Instructions

Format: OP

Example: ADD

• Uses stack (implicit operands)
• Pops two values, adds, pushes result

Advantages:

• Shortest instructions
• Good for expression evaluation

Disadvantages:

• Stack management overhead
• Less intuitive

Addressing Modes

1. Immediate Addressing

Format: OP #value

Example: ADD R1, #5

• Operand is part of instruction
• Meaning: R1 = R1 + 5

Advantages:

• Fast (no memory access)
• Simple

Disadvantages:

• Limited range
• Value must be constant

2. Direct Addressing

Format: OP address

Example: ADD R1, 1000

• Address is part of instruction
• Meaning: R1 = R1 + [1000]

Advantages:

• Single memory access
• Simple

Disadvantages:

• Limited address space
• Address must be known at compile time

3. Indirect Addressing

Format: OP @address

Example: ADD R1, @1000

• Address points to another address
• Meaning: R1 = R1 + [[1000]]

Advantages:

• Flexible
• Can use pointers

Disadvantages:

• Two memory accesses
• Slower

4. Register Addressing

Format: OP R1, R2

Example: ADD R1, R2

• Operand is in register
• Meaning: R1 = R1 + R2

Advantages:

• Fastest (no memory access)
• Efficient

Disadvantages:

• Limited number of registers
• Register allocation needed

5. Register Indirect Addressing

Format: OP (R1)

Example: ADD R1, (R2)

• Register contains address
• Meaning: R1 = R1 + [R2]

Advantages:

• Flexible addressing
• Efficient for arrays

Disadvantages:

• One memory access
• Register must contain valid address

6. Indexed Addressing

Format: OP R1, X(R2)

Example: ADD R1, 100(R2)

• Effective address = X + [R2]
• Meaning: R1 = R1 + [100 + R2]

Advantages:

• Good for array access
• Flexible

Disadvantages:

• Address calculation needed
• Slightly slower

7. Base-Register Addressing

Format: OP R1, (BASE)

Example: ADD R1, (BASE)

• Similar to indexed, but BASE is special register
• Used for relocation

8. Relative Addressing

Format: OP R1, PC + offset

Example: ADD R1, PC + 10

• Address relative to Program Counter
• Used for branches

Advantages:

• Position independent code
• Efficient for branches

Instruction Types

1. Data Transfer Instructions

• LOAD: Memory to register
• STORE: Register to memory
• MOVE: Register to register

Example:

LOAD R1, 1000    ; R1 = [1000]
STORE R1, 2000   ; [2000] = R1
MOVE R2, R1      ; R2 = R1

2. Arithmetic Instructions

• ADD: Addition
• SUB: Subtraction
• MUL: Multiplication
• DIV: Division

Example:

ADD R1, R2, R3   ; R1 = R2 + R3
SUB R1, R2, R3   ; R1 = R2 - R3
MUL R1, R2, R3   ; R1 = R2 × R3

3. Logical Instructions

• AND: Bitwise AND
• OR: Bitwise OR
• XOR: Bitwise XOR
• NOT: Bitwise NOT

Example:

AND R1, R2, R3   ; R1 = R2 & R3
OR R1, R2, R3    ; R1 = R2 | R3
XOR R1, R2, R3   ; R1 = R2 ⊕ R3
NOT R1, R2       ; R1 = ~R2

4. Shift Instructions

• SHL: Shift left
• SHR: Shift right
• ROL: Rotate left
• ROR: Rotate right

Example:

SHL R1, R2, 2    ; R1 = R2 << 2
SHR R1, R2, 2    ; R1 = R2 >> 2

5. Branch Instructions

• JUMP: Unconditional branch
• BRANCH: Conditional branch
• CALL: Subroutine call
• RETURN: Return from subroutine

Example:

JUMP 1000        ; PC = 1000
BRANCH R1 > 0, 500  ; if R1 > 0, PC = 500
CALL 2000        ; Call subroutine at 2000
RETURN           ; Return from subroutine

6. Compare Instructions

• CMP: Compare two values
• Sets condition codes (flags)

Example:

CMP R1, R2       ; Compare R1 and R2, set flags
BRANCH EQ, 100   ; Branch if equal

Instruction Encoding

Fixed-Length Encoding

• All instructions same size
• Simple decoding
• May waste space

Example: 32-bit fixed format

Variable-Length Encoding

• Instructions can have different sizes
• More efficient space usage
• Complex decoding

Example: x86 uses variable-length

GATE CS Important Points

1. Addressing Modes: Know all 8 addressing modes thoroughly
2. Instruction Formats: Understand 0, 1, 2, 3 address formats
3. Instruction Types: Know data transfer, arithmetic, logical, branch instructions
4. Effective Address Calculation: Practice calculating effective addresses
5. Instruction Encoding: Understand fixed vs variable length

Practice Tips

1. Trace Instructions: Manually trace instruction execution
2. Calculate Effective Addresses: Practice all addressing modes
3. Understand Formats: Know when to use which format
4. Previous Year Questions: Solve GATE COA questions from last 10 years