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GATE CS - Computer Organization
Master CPU design, instruction formats, pipelining, and memory hierarchy
50 questions•5 pages•~75 min
Use this quiz track to strengthen recall, speed, and exam-style decision making. Attempt one page first, review explanations, and then re-attempt incorrect questions without notes.
A good scoring strategy is to mark uncertain questions, finish known ones quickly, and return with elimination logic. This improves accuracy while keeping momentum under time constraints.
Progress: 0 / 500%
Page 1 of 5 • Questions 1-10 of 50
Q1easy
What is the purpose of the Program Counter (PC) register?
Q2easy
What is the main function of the ALU (Arithmetic Logic Unit)?
Q3easy
Which addressing mode uses the value directly from the instruction?
Q4medium
What is the effective address in indexed addressing mode?
Q5easy
What is the main advantage of pipelining?
Q6medium
What is a data hazard in pipelining?
Q7medium
What is the purpose of forwarding (bypassing) in pipelining?
Q8easy
What is the main advantage of cache memory?
Q9easy
What is the mapping technique where each memory block maps to exactly one cache block?
Q10medium
What is the main advantage of set-associative cache over direct-mapped?
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